Frequency response of single stage JFET CS amplifier

Frequency response : Frequency response of an amplifier is a graph,which indicates the relationship between the voltage gain (in decibel )as a function of frequency.Amplifiers exhibit a band of frequencies over which the output remains nearly constant. 

Fig.1

As shown in Fig.1 the bandwidth is BW =  ω2- ω1 where ω2 and ω1 are the higher cutoff frequency and lower cutoff frequency respectively. At these frequencies, |Vout |= = √2 ⁄ 2 = 0.707 and these two points are known as the 3-dB down or half-power points.We can define the bandwidth as the frequency band between half-power points.Alternately , bandwidth is where Midband frequency occur from which analysis of amplifier can be done.
In a.c. equivalent circuit (small signal model ) , we can determine small changes about quiescent point and the signals can be represented by small changes. It has been observed that transistor behavior is different for low frequencies and high frequencies .At high frequency the barrier capacitance across gate to source and gate to drain terminals come into role for analysis of amplifier . 

Small Signal Low-Frequency FET Model :

In this model , the gate to source junction is represented as open circuit . As input resistance is large in small signal model , there is no input current at the input terminal of JFET . As we know , gate to source voltage affects the drain current . This is indicated by voltage-controlled current source (gm.vgs) which is proportional to the gate to source voltage .The FET transconductance (gm) is measured as milliamperes per volt (mA/V). Its typical lies between 0.5mA/V to 10mA/V.
FET output resistance is indicated by rd.Typical value of the drain resistance is from 100kΩ  to 1MΩ .  Amplification factor (𝜇 )of the field effect transistor is equal to the product of transconductance (gm) and drain resistance (rd)  .
 
Small Signal High-Frequency FET Model :  





The small signal high frequency model of JFET is similar to that of  small signal low frequency model. except it has addition at capacitances between each pair of terminals .Cgs represents the barrier capacitance between the gate and source . It has typical value of 1pF to 10pF . The capacitor Cgd represents barrier capacitance between gate and drain .Its typical value is also from 1pF to 10pF.Cds represents the drain to source capacitance .Its typical value is from 0.1pF to 1pF.